Operating Systems: Week 4

 The paging part of this week was actually very enjoyable. I think this is because I was able to better understand the material by giving myself more time to go through it all. I enjoyed the practice problems given to us in the videos, book, and labs. During this week, we have gone through more information about what memory consists of. Throughout this week, we learned about paging, Translation Lookaside Buffers (TLB), multi-level paging, and swapping. 

Paging breaks up space in virtual address into equal sections of size. This method avoids fragmentation and is flexible. Each process will have its own page table where virtual addresses translate into physical addresses. The virtual address has its virtual page number and offset. I learned about the address translation being mapped to a page frame number as I saw examples of it on the videos as well as in the book. 

A bad part of paging is that address translations are slow, and the page tables are too big. This is where multi-level paging and translation lookaside buffer (TLC) can come in and help with handling these problems. The translation lookaside buffer helps with the address translation being slow, as it helps with the speed because it is a hardware cache. Multi-level paging helps with bigger page tables as it breaks the page tables into page-sized chunks. This helps page tables to avoid waste.

I also learned about swapping this week and the mechanics of it. In a page table, there is a present bit that shows whether a page is present or not in memory. If the virtual page is not present, then there is a page fault. There is much more to this week, but these are the main ideas I fully understood.